UA1ZBE Custom Firmware v1.0

Features:
- VFO mode with direct frequency input
- POCSAG decoder (512/1200 baud) with BCH(31,21) correction
- Full-screen Spectrum analyzer
- FM Radio receiver
- RSSI signal indicator overlay
- Custom boot splash (UA1ZBE / POCSAG pager / build date)

Architecture:
- app/mode.c — mode dispatcher (VFO/POCSAG/Spectrum/FM)
- app/boot_splash.c — 2-second boot splash
- app/pocsag/ — POCSAG decoder + BCH correction
- app/display_rssi.c — RSSI indicator
- main.c — entry point with custom init
- syscalls.c — bare-metal _sbrk stub

Build: arm-none-eabi-gcc -Os -flto -Wall -Werror -Wextra
Size: 57.9KB Flash / 3.6KB RAM

Controls:
- 0-9: Direct frequency input (VFO)
- SK2: POCSAG mode
- SK1: Spectrum analyzer
- 0: FM Radio
- EXIT: Return to VFO
- F/*: Toggle 512/1200 baud (in POCSAG)

bsp/dp32g030/irq.h

@@ -0,0 +1,40 @@
+#ifndef DP32G030_IRQ_H
+#define DP32G030_IRQ_H
+
+enum {
+	DP32_WWDT_IRQn = 0,
+	DP32_IWDT_IRQn,
+	DP32_RTC_IRQn,
+	DP32_DMA_IRQn,
+	DP32_SARADC_IRQn,
+	DP32_TIMER_BASE0_IRQn,
+	DP32_TIMER_BASE1_IRQn,
+	DP32_TIMER_PLUS0_IRQn,
+	DP32_TIMER_PLUS1_IRQn,
+	DP32_PWM_BASE0_IRQn,
+	DP32_PWM_BASE1_IRQn,
+	DP32_PWM_PLUS0_IRQn,
+	DP32_PWM_PLUS1_IRQn,
+	DP32_UART0_IRQn,
+	DP32_UART1_IRQn,
+	DP32_UART2_IRQn,
+	DP32_SPI0_IRQn,
+	DP32_SPI1_IRQn,
+	DP32_IIC0_IRQn,
+	DP32_IIC1_IRQn,
+	DP32_CMP_IRQn,
+	DP32_TIMER_BASE2_IRQn,
+	DP32_GPIOA5_IRQn,
+	DP32_GPIOA6_IRQn,
+	DP32_GPIOA7_IRQn,
+	DP32_GPIOB0_IRQn,
+	DP32_GPIOB1_IRQn,
+	DP32_GPIOC0_IRQn,
+	DP32_GPIOC1_IRQn,
+	DP32_GPIOA_IRQn,
+	DP32_GPIOB_IRQn,
+	DP32_GPIOC_IRQn,
+};
+
+#endif
+