ua1zbe
a1206d6fd4
Features: - VFO mode with direct frequency input - POCSAG decoder (512/1200 baud) with BCH(31,21) correction - Full-screen Spectrum analyzer - FM Radio receiver - RSSI signal indicator overlay - Custom boot splash (UA1ZBE / POCSAG pager / build date) Architecture: - app/mode.c — mode dispatcher (VFO/POCSAG/Spectrum/FM) - app/boot_splash.c — 2-second boot splash - app/pocsag/ — POCSAG decoder + BCH correction - app/display_rssi.c — RSSI indicator - main.c — entry point with custom init - syscalls.c — bare-metal _sbrk stub Build: arm-none-eabi-gcc -Os -flto -Wall -Werror -Wextra Size: 57.9KB Flash / 3.6KB RAM Controls: - 0-9: Direct frequency input (VFO) - SK2: POCSAG mode - SK1: Spectrum analyzer - 0: FM Radio - EXIT: Return to VFO - F/*: Toggle 512/1200 baud (in POCSAG)
110 lines
6.5 KiB
C
110 lines
6.5 KiB
C
/* Copyright 2023 Dual Tachyon
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* https://github.com/DualTachyon
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef HARDWARE_DP32G030_CRC_H
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#define HARDWARE_DP32G030_CRC_H
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#if !defined(__ASSEMBLY__)
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#include <stdint.h>
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#endif
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/* -------- CRC -------- */
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#define CRC_BASE_ADDR 0x40003000U
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#define CRC_BASE_SIZE 0x00000800U
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#define CRC_CR_ADDR (CRC_BASE_ADDR + 0x0000U)
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#define CRC_CR (*(volatile uint32_t *)CRC_CR_ADDR)
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#define CRC_CR_CRC_EN_SHIFT 0
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#define CRC_CR_CRC_EN_WIDTH 1
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#define CRC_CR_CRC_EN_MASK (((1U << CRC_CR_CRC_EN_WIDTH) - 1U) << CRC_CR_CRC_EN_SHIFT)
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#define CRC_CR_CRC_EN_VALUE_DISABLE 0U
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#define CRC_CR_CRC_EN_BITS_DISABLE (CRC_CR_CRC_EN_VALUE_DISABLE << CRC_CR_CRC_EN_SHIFT)
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#define CRC_CR_CRC_EN_VALUE_ENABLE 1U
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#define CRC_CR_CRC_EN_BITS_ENABLE (CRC_CR_CRC_EN_VALUE_ENABLE << CRC_CR_CRC_EN_SHIFT)
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#define CRC_CR_INPUT_REV_SHIFT 1
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#define CRC_CR_INPUT_REV_WIDTH 1
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#define CRC_CR_INPUT_REV_MASK (((1U << CRC_CR_INPUT_REV_WIDTH) - 1U) << CRC_CR_INPUT_REV_SHIFT)
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#define CRC_CR_INPUT_REV_VALUE_NORMAL 0U
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#define CRC_CR_INPUT_REV_BITS_NORMAL (CRC_CR_INPUT_REV_VALUE_NORMAL << CRC_CR_INPUT_REV_SHIFT)
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#define CRC_CR_INPUT_REV_VALUE_REVERSED 1U
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#define CRC_CR_INPUT_REV_BITS_REVERSED (CRC_CR_INPUT_REV_VALUE_REVERSED << CRC_CR_INPUT_REV_SHIFT)
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#define CRC_CR_INPUT_INV_SHIFT 2
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#define CRC_CR_INPUT_INV_WIDTH 2
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#define CRC_CR_INPUT_INV_MASK (((1U << CRC_CR_INPUT_INV_WIDTH) - 1U) << CRC_CR_INPUT_INV_SHIFT)
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#define CRC_CR_INPUT_INV_VALUE_NORMAL 0U
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#define CRC_CR_INPUT_INV_BITS_NORMAL (CRC_CR_INPUT_INV_VALUE_NORMAL << CRC_CR_INPUT_INV_SHIFT)
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#define CRC_CR_INPUT_INV_VALUE_BIT_INVERTED 1U
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#define CRC_CR_INPUT_INV_BITS_BIT_INVERTED (CRC_CR_INPUT_INV_VALUE_BIT_INVERTED << CRC_CR_INPUT_INV_SHIFT)
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#define CRC_CR_INPUT_INV_VALUE_BYTE_INVERTED 2U
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#define CRC_CR_INPUT_INV_BITS_BYTE_INVERTED (CRC_CR_INPUT_INV_VALUE_BYTE_INVERTED << CRC_CR_INPUT_INV_SHIFT)
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#define CRC_CR_INPUT_INV_VALUE_BIT_BYTE_INVERTED 3U
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#define CRC_CR_INPUT_INV_BITS_BIT_BYTE_INVERTED (CRC_CR_INPUT_INV_VALUE_BIT_BYTE_INVERTED << CRC_CR_INPUT_INV_SHIFT)
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#define CRC_CR_OUTPUT_REV_SHIFT 4
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#define CRC_CR_OUTPUT_REV_WIDTH 1
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#define CRC_CR_OUTPUT_REV_MASK (((1U << CRC_CR_OUTPUT_REV_WIDTH) - 1U) << CRC_CR_OUTPUT_REV_SHIFT)
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#define CRC_CR_OUTPUT_REV_VALUE_NORMAL 0U
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#define CRC_CR_OUTPUT_REV_BITS_NORMAL (CRC_CR_OUTPUT_REV_VALUE_NORMAL << CRC_CR_OUTPUT_REV_SHIFT)
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#define CRC_CR_OUTPUT_REV_VALUE_REVERSED 1U
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#define CRC_CR_OUTPUT_REV_BITS_REVERSED (CRC_CR_OUTPUT_REV_VALUE_REVERSED << CRC_CR_OUTPUT_REV_SHIFT)
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#define CRC_CR_OUTPUT_INV_SHIFT 5
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#define CRC_CR_OUTPUT_INV_WIDTH 2
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#define CRC_CR_OUTPUT_INV_MASK (((1U << CRC_CR_OUTPUT_INV_WIDTH) - 1U) << CRC_CR_OUTPUT_INV_SHIFT)
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#define CRC_CR_OUTPUT_INV_VALUE_NORMAL 0U
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#define CRC_CR_OUTPUT_INV_BITS_NORMAL (CRC_CR_OUTPUT_INV_VALUE_NORMAL << CRC_CR_OUTPUT_INV_SHIFT)
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#define CRC_CR_OUTPUT_INV_VALUE_BIT_INVERTED 1U
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#define CRC_CR_OUTPUT_INV_BITS_BIT_INVERTED (CRC_CR_OUTPUT_INV_VALUE_BIT_INVERTED << CRC_CR_OUTPUT_INV_SHIFT)
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#define CRC_CR_OUTPUT_INV_VALUE_BYTE_INVERTED 2U
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#define CRC_CR_OUTPUT_INV_BITS_BYTE_INVERTED (CRC_CR_OUTPUT_INV_VALUE_BYTE_INVERTED << CRC_CR_OUTPUT_INV_SHIFT)
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#define CRC_CR_OUTPUT_INV_VALUE_BIT_BYTE_INVERTED 3U
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#define CRC_CR_OUTPUT_INV_BITS_BIT_BYTE_INVERTED (CRC_CR_OUTPUT_INV_VALUE_BIT_BYTE_INVERTED << CRC_CR_OUTPUT_INV_SHIFT)
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#define CRC_CR_DATA_WIDTH_SHIFT 7
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#define CRC_CR_DATA_WIDTH_WIDTH 2
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#define CRC_CR_DATA_WIDTH_MASK (((1U << CRC_CR_DATA_WIDTH_WIDTH) - 1U) << CRC_CR_DATA_WIDTH_SHIFT)
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#define CRC_CR_DATA_WIDTH_VALUE_32 0U
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#define CRC_CR_DATA_WIDTH_BITS_32 (CRC_CR_DATA_WIDTH_VALUE_32 << CRC_CR_DATA_WIDTH_SHIFT)
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#define CRC_CR_DATA_WIDTH_VALUE_16 1U
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#define CRC_CR_DATA_WIDTH_BITS_16 (CRC_CR_DATA_WIDTH_VALUE_16 << CRC_CR_DATA_WIDTH_SHIFT)
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#define CRC_CR_DATA_WIDTH_VALUE_8 2U
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#define CRC_CR_DATA_WIDTH_BITS_8 (CRC_CR_DATA_WIDTH_VALUE_8 << CRC_CR_DATA_WIDTH_SHIFT)
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#define CRC_CR_CRC_SEL_SHIFT 9
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#define CRC_CR_CRC_SEL_WIDTH 2
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#define CRC_CR_CRC_SEL_MASK (((1U << CRC_CR_CRC_SEL_WIDTH) - 1U) << CRC_CR_CRC_SEL_SHIFT)
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#define CRC_CR_CRC_SEL_VALUE_CRC_16_CCITT 0U
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#define CRC_CR_CRC_SEL_BITS_CRC_16_CCITT (CRC_CR_CRC_SEL_VALUE_CRC_16_CCITT << CRC_CR_CRC_SEL_SHIFT)
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#define CRC_CR_CRC_SEL_VALUE_CRC_8_ATM 1U
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#define CRC_CR_CRC_SEL_BITS_CRC_8_ATM (CRC_CR_CRC_SEL_VALUE_CRC_8_ATM << CRC_CR_CRC_SEL_SHIFT)
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#define CRC_CR_CRC_SEL_VALUE_CRC_16 2U
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#define CRC_CR_CRC_SEL_BITS_CRC_16 (CRC_CR_CRC_SEL_VALUE_CRC_16 << CRC_CR_CRC_SEL_SHIFT)
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#define CRC_CR_CRC_SEL_VALUE_CRC_32_IEEE802_3 3U
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#define CRC_CR_CRC_SEL_BITS_CRC_32_IEEE802_3 (CRC_CR_CRC_SEL_VALUE_CRC_32_IEEE802_3 << CRC_CR_CRC_SEL_SHIFT)
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#define CRC_IV_ADDR (CRC_BASE_ADDR + 0x0004U)
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#define CRC_IV (*(volatile uint32_t *)CRC_IV_ADDR)
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#define CRC_DATAIN_ADDR (CRC_BASE_ADDR + 0x0008U)
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#define CRC_DATAIN (*(volatile uint32_t *)CRC_DATAIN_ADDR)
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#define CRC_DATAOUT_ADDR (CRC_BASE_ADDR + 0x000CU)
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#define CRC_DATAOUT (*(volatile uint32_t *)CRC_DATAOUT_ADDR)
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#endif
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