Files
uv-k5-ua1zbe-firmware/external/CMSIS_5/CMSIS/RTOS2/RTX/Include/rtx_def.h
ua1zbe a1206d6fd4 UA1ZBE Custom Firmware v1.0
Features:
- VFO mode with direct frequency input
- POCSAG decoder (512/1200 baud) with BCH(31,21) correction
- Full-screen Spectrum analyzer
- FM Radio receiver
- RSSI signal indicator overlay
- Custom boot splash (UA1ZBE / POCSAG pager / build date)

Architecture:
- app/mode.c — mode dispatcher (VFO/POCSAG/Spectrum/FM)
- app/boot_splash.c — 2-second boot splash
- app/pocsag/ — POCSAG decoder + BCH correction
- app/display_rssi.c — RSSI indicator
- main.c — entry point with custom init
- syscalls.c — bare-metal _sbrk stub

Build: arm-none-eabi-gcc -Os -flto -Wall -Werror -Wextra
Size: 57.9KB Flash / 3.6KB RAM

Controls:
- 0-9: Direct frequency input (VFO)
- SK2: POCSAG mode
- SK1: Spectrum analyzer
- 0: FM Radio
- EXIT: Return to VFO
- F/*: Toggle 512/1200 baud (in POCSAG)
2026-04-12 00:44:05 +03:00

74 lines
2.0 KiB
C

/*
* Copyright (c) 2021-2023 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* -----------------------------------------------------------------------------
*
* Project: CMSIS-RTOS RTX
* Title: RTX derived definitions
*
* -----------------------------------------------------------------------------
*/
#ifndef RTX_DEF_H_
#define RTX_DEF_H_
#ifdef _RTE_
#include "RTE_Components.h"
#endif
#include "RTX_Config.h"
#if (defined(OS_SAFETY_FEATURES) && (OS_SAFETY_FEATURES != 0))
#define RTX_SAFETY_FEATURES
#if (defined(OS_SAFETY_CLASS) && (OS_SAFETY_CLASS != 0))
#define RTX_SAFETY_CLASS
#endif
#if (defined(OS_EXECUTION_ZONE) && (OS_EXECUTION_ZONE != 0))
#define RTX_EXECUTION_ZONE
#endif
#if (defined(OS_THREAD_WATCHDOG) && (OS_THREAD_WATCHDOG != 0))
#define RTX_THREAD_WATCHDOG
#endif
#if (defined(OS_OBJ_PTR_CHECK) && (OS_OBJ_PTR_CHECK != 0))
#define RTX_OBJ_PTR_CHECK
#endif
#if (defined(OS_SVC_PTR_CHECK) && (OS_SVC_PTR_CHECK != 0))
#define RTX_SVC_PTR_CHECK
#endif
#endif
#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))
#define RTX_OBJ_MEM_USAGE
#endif
#if (defined(OS_STACK_CHECK) && (OS_STACK_CHECK != 0))
#define RTX_STACK_CHECK
#endif
#if (defined(OS_TZ_CONTEXT) && (OS_TZ_CONTEXT != 0))
#define RTX_TZ_CONTEXT
#endif
#ifndef DOMAIN_NS
#ifdef RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS
#define DOMAIN_NS 1
#else
#define DOMAIN_NS 0
#endif
#endif
#endif // RTX_DEF_H_