ua1zbe
a1206d6fd4
Features: - VFO mode with direct frequency input - POCSAG decoder (512/1200 baud) with BCH(31,21) correction - Full-screen Spectrum analyzer - FM Radio receiver - RSSI signal indicator overlay - Custom boot splash (UA1ZBE / POCSAG pager / build date) Architecture: - app/mode.c — mode dispatcher (VFO/POCSAG/Spectrum/FM) - app/boot_splash.c — 2-second boot splash - app/pocsag/ — POCSAG decoder + BCH correction - app/display_rssi.c — RSSI indicator - main.c — entry point with custom init - syscalls.c — bare-metal _sbrk stub Build: arm-none-eabi-gcc -Os -flto -Wall -Werror -Wextra Size: 57.9KB Flash / 3.6KB RAM Controls: - 0-9: Direct frequency input (VFO) - SK2: POCSAG mode - SK1: Spectrum analyzer - 0: FM Radio - EXIT: Return to VFO - F/*: Toggle 512/1200 baud (in POCSAG)
78 lines
2.6 KiB
Plaintext
78 lines
2.6 KiB
Plaintext
#! armclang -E --target=arm-arm-none-eabi -mcpu=cortex-a5 -xc
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;**************************************************
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; Copyright (c) 2017 ARM Ltd. All rights reserved.
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;**************************************************
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; Scatter-file for RTX Example on Versatile Express
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; This scatter-file places application code, data, stack and heap at suitable addresses in the memory map.
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; This platform has 2GB SDRAM starting at 0x80000000.
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#include "mem_ARMCA5.h"
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SDRAM __ROM_BASE __ROM_SIZE ; load region size_region
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{
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VECTORS __ROM_BASE __ROM_SIZE ; load address = execution address
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{
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* (RESET, +FIRST) ; Vector table and other startup code
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* (InRoot$$Sections) ; All (library) code that must be in a root region
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* (+RO-CODE) ; Application RO code (.text)
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* (+RO-DATA) ; Application RO data (.constdata)
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}
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RW_DATA __RAM_BASE __RW_DATA_SIZE
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{ * (+RW) } ; Application RW data (.data)
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ZI_DATA (__RAM_BASE+
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__RW_DATA_SIZE) __ZI_DATA_SIZE
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{ * (+ZI) } ; Application ZI data (.bss)
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ARM_LIB_HEAP (__RAM_BASE
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+__RW_DATA_SIZE
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+__ZI_DATA_SIZE) EMPTY __HEAP_SIZE ; Heap region growing up
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{ }
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ARM_LIB_STACK (__RAM_BASE
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+__RAM_SIZE
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-__FIQ_STACK_SIZE
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-__IRQ_STACK_SIZE
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-__SVC_STACK_SIZE
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-__ABT_STACK_SIZE
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-__UND_STACK_SIZE) EMPTY -__STACK_SIZE ; Stack region growing down
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{ }
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UND_STACK (__RAM_BASE
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+__RAM_SIZE
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-__FIQ_STACK_SIZE
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-__IRQ_STACK_SIZE
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-__SVC_STACK_SIZE
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-__ABT_STACK_SIZE) EMPTY -__UND_STACK_SIZE ; UND mode stack
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{ }
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ABT_STACK (__RAM_BASE
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+__RAM_SIZE
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-__FIQ_STACK_SIZE
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-__IRQ_STACK_SIZE
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-__SVC_STACK_SIZE) EMPTY -__ABT_STACK_SIZE ; ABT mode stack
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{ }
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SVC_STACK (__RAM_BASE
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+__RAM_SIZE
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-__FIQ_STACK_SIZE
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-__IRQ_STACK_SIZE) EMPTY -__SVC_STACK_SIZE ; SVC mode stack
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{ }
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IRQ_STACK (__RAM_BASE
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+__RAM_SIZE
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-__FIQ_STACK_SIZE) EMPTY -__IRQ_STACK_SIZE ; IRQ mode stack
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{ }
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FIQ_STACK (__RAM_BASE
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+__RAM_SIZE) EMPTY -__FIQ_STACK_SIZE ; FIQ mode stack
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{ }
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TTB __TTB_BASE EMPTY __TTB_SIZE ; Level-1 Translation Table for MMU
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{ }
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}
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