Features: - VFO mode with direct frequency input - POCSAG decoder (512/1200 baud) with BCH(31,21) correction - Full-screen Spectrum analyzer - FM Radio receiver - RSSI signal indicator overlay - Custom boot splash (UA1ZBE / POCSAG pager / build date) Architecture: - app/mode.c — mode dispatcher (VFO/POCSAG/Spectrum/FM) - app/boot_splash.c — 2-second boot splash - app/pocsag/ — POCSAG decoder + BCH correction - app/display_rssi.c — RSSI indicator - main.c — entry point with custom init - syscalls.c — bare-metal _sbrk stub Build: arm-none-eabi-gcc -Os -flto -Wall -Werror -Wextra Size: 57.9KB Flash / 3.6KB RAM Controls: - 0-9: Direct frequency input (VFO) - SK2: POCSAG mode - SK1: Spectrum analyzer - 0: FM Radio - EXIT: Return to VFO - F/*: Toggle 512/1200 baud (in POCSAG)
99 lines
3.2 KiB
C
99 lines
3.2 KiB
C
/**************************************************************************//**
|
|
* @file system_ARMv8MML.c
|
|
* @brief CMSIS Device System Source File for
|
|
* ARMv8MML Device
|
|
* @version V1.0.1
|
|
* @date 15. November 2019
|
|
******************************************************************************/
|
|
/*
|
|
* Copyright (c) 2009-2019 Arm Limited. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*
|
|
* Licensed under the Apache License, Version 2.0 (the License); you may
|
|
* not use this file except in compliance with the License.
|
|
* You may obtain a copy of the License at
|
|
*
|
|
* www.apache.org/licenses/LICENSE-2.0
|
|
*
|
|
* Unless required by applicable law or agreed to in writing, software
|
|
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
|
|
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
* See the License for the specific language governing permissions and
|
|
* limitations under the License.
|
|
*/
|
|
|
|
#if defined (ARMv8MML)
|
|
#include "ARMv8MML.h"
|
|
#elif defined (ARMv8MML_DSP)
|
|
#include "ARMv8MML_DSP.h"
|
|
#elif defined (ARMv8MML_SP)
|
|
#include "ARMv8MML_SP.h"
|
|
#elif defined (ARMv8MML_DSP_SP)
|
|
#include "ARMv8MML_DSP_SP.h"
|
|
#elif defined (ARMv8MML_DP)
|
|
#include "ARMv8MML_DP.h"
|
|
#elif defined (ARMv8MML_DSP_DP)
|
|
#include "ARMv8MML_DSP_DP.h"
|
|
#else
|
|
#error device not specified!
|
|
#endif
|
|
|
|
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
|
#include "partition_ARMv8MML.h"
|
|
#endif
|
|
|
|
/*----------------------------------------------------------------------------
|
|
Define clocks
|
|
*----------------------------------------------------------------------------*/
|
|
#define XTAL (50000000UL) /* Oscillator frequency */
|
|
|
|
#define SYSTEM_CLOCK (XTAL / 2U)
|
|
|
|
|
|
/*----------------------------------------------------------------------------
|
|
Exception / Interrupt Vector table
|
|
*----------------------------------------------------------------------------*/
|
|
extern const VECTOR_TABLE_Type __VECTOR_TABLE[496];
|
|
|
|
|
|
/*----------------------------------------------------------------------------
|
|
System Core Clock Variable
|
|
*----------------------------------------------------------------------------*/
|
|
uint32_t SystemCoreClock = SYSTEM_CLOCK; /* System Core Clock Frequency */
|
|
|
|
|
|
/*----------------------------------------------------------------------------
|
|
System Core Clock update function
|
|
*----------------------------------------------------------------------------*/
|
|
void SystemCoreClockUpdate (void)
|
|
{
|
|
SystemCoreClock = SYSTEM_CLOCK;
|
|
}
|
|
|
|
/*----------------------------------------------------------------------------
|
|
System initialization function
|
|
*----------------------------------------------------------------------------*/
|
|
void SystemInit (void)
|
|
{
|
|
|
|
#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
|
|
SCB->VTOR = (uint32_t) &(__Vectors[0]);
|
|
#endif
|
|
|
|
#if defined (__FPU_USED) && (__FPU_USED == 1U)
|
|
SCB->CPACR |= ((3U << 10U*2U) | /* enable CP10 Full Access */
|
|
(3U << 11U*2U) ); /* enable CP11 Full Access */
|
|
#endif
|
|
|
|
#ifdef UNALIGNED_SUPPORT_DISABLE
|
|
SCB->CCR |= SCB_CCR_UNALIGN_TRP_Msk;
|
|
#endif
|
|
|
|
#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
|
|
TZ_SAU_Setup();
|
|
#endif
|
|
|
|
SystemCoreClock = SYSTEM_CLOCK;
|
|
}
|